Analysis of Different Verification Techniques for FPGA Design

there is growing interest in the market to implement FPGA-based systems. The escalating cost, time, and risk associated with custom integrated circuit (IC) fabrication has driven increased field programmable gate array (FPGA) usage across electronics applications. With the increasing size andcomplexity of FPGA devices, there is a need for more efficient verification methods. This paper is an effort to servey the different methodologies in te field of FPGA design verification

Keywords:

FPGA , Verification , Simulation , prototyping , SOC