A Low-Loss Wilkinson Power Divider in 0.18 ىm CMOS Technology

A lumped-element low-loss low-power Wilkinson power divider implemented in a standard 0.18ىm CMOS process is proposed. A compensation technique based on negative-resistance is used to compensate the loss of low-Q lumped-elements. Drawing a DC current of 1mA from a 1.8V supply voltage, the proposed circuit gives an insertion loss variation less than 0.7 dB, an input/output return loss better than 10.2 dB, and a port-to-port isolation better than 13.8 dB from 18 to 26 GHz (K-Band).

Keywords:

Wilkinson power divider , CMOS , Low-Loss , Lumped-element