Small Area GDI Based Single Bit Magnitude Comparator with Low Power and High Speed

Publish Year: 1398
نوع سند: مقاله کنفرانسی
زبان: English
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شناسه ملی سند علمی:

EMECCONF04_005

تاریخ نمایه سازی: 11 اسفند 1398

Abstract:

In this paper with focusing on the most important parameter in dynamic power consumption which area occupation reduction, a new 1-bit magnitude comparator with only 11 transistors and non-use of any inverters in inputs is presented. Low internal nodes and consequently low internal parasitic and diffusion capacitances provided the proposed circuit with high efficiency in term of power, speed and energy saving. Extensive simulations regarding dynamic power consumption such as power supply, frequency, load capacitance and temperature accomplished. Also, in term of Process Voltage Temperature (PVT) variations Monte Carlo used with standard deviations. All attained results under various and diverse circumstances proved the superiority of the proposed circuit in term of PDP consumption compared to its state of the art designs. Hence, high reliability and practicability of the proposed circuit nominated it as an adequate alternative to conventional designs for being utilized in different applications such as image processing.

Authors

Ayoub Sadeghi

Department of Electrical and Electronics Engineering, Shiraz Branch, Islamic Azad University, Shiraz, Iran.

Nabiollah Shiri

Department of Electrical and Electronics Engineering, Shiraz Branch, Islamic Azad University, Shiraz, Iran