High Voltage Lateral SOI PIN Diode without Impurity Doped Junctions: Investigation and Proposal

In this paper, we propose an approach for realizing a high-voltage lateral SOI PIN diode without doping the SOI film using high temperature thermal budgets. Applying different metal work function electrodes, the electron charge plasma and hole charge plasma are induced in an intrinsic silicon film to create the n cathode and the p anode regions, respectively. Using two-dimensional device simulations, we have evaluated the performance of the high-voltage charge plasma PIN (CP-PIN) diode. We demonstrate that without the need to create deep diffused doped regions, the performance of the CP-PIN diode in forward and reverse bias conditions is identical to that a conventional SOI PIN diode with similar dimensions.

Keywords:

Charge Plasma , PIN diodes , silicon-on-insulator (SOI) , Simulation