Impact of Gate Length on Four Metal Cylindrical Gate All Around Silicon Nanowire MOSFETs

In this paper, the design and simulation of a silicon nanowire transistors, gate all around, cylindrical MOSFETs with four metals gate is presented .The MOS transistors, which are main part of LSI system, must be miniaturized to obtain better performance and bring down costs.And the gate dielectric, which separates the gate electrode from carrier passage, must also be thinner following the scaling law. Shrinking device dimensions leads to a reduction in the thickness of the gate dielectric (sio2) to less than 1nm in, which is already causing problems in the miniaturization MOSFETs, such as short channel effects and leakage current will be. In order to fix this problems, the gate dielectric with k higher and thicker, and four metal with different work functions, the gate is used .In this structure, the gate electrode consists of four materials M1, M2, M3 and M4 of different workfunctions deposited over respective lengths L1, L2, L3 and L4 on the gate oxide layers. The gate materials are chosen in such a way that ,the gate material at the source end is with the highest work function called the control gate and the material at the drain end is with the lowest work function.(wf1, wf2, wf3, wf4: 5.0 ev, 4.8 ev, 4.6 ev, 4.4 ev). In this study,simulator Atlas Silvaco device Simulator is used for simulation. In this study, the transistor is Junctionless. In this paper, the influence of gate length, on the DIBL, Ion, Ioff been investigated. (gate length: 9.7,10.7,12.8,14,17,20,24,30nm).As the influence of gate length on the characteristic Id- Vd and Id-Vg been investigated . By increasing the gate length, DIBL, Ion and Ioff decreases

Keywords:

Silicon Nanowire MOSFETs , Cylindrical GAA , Gate of Four Metal , Gate Length