Design and Simulation of an Ultra Low-Power Low-Voltage Mixer by using of MOSFET Performance in Subthreshold Region

In this paper an ultra low-power low-voltage mixer based on MOSFET transistors performance in the subthreshold region is described. The subthreshold region performance advantages of the MOS transistors is used to achieve a good performance to design the proposed mixer. The RF, LO and IF port frequencies are 2.4 GHz, 2.3 GHz and 100 MHz, respectively . Simulation results of the proposed mixer in TSMC 0.18-μm CMOS technology depict a maximum conversion gain of 7.93 dB, a double-sideband (DSB) noise figure of 13.68 dB, and an input third-order intercept point (IIP3) of -4 dBm. The supply voltage of the circuit is 0.7 V and the power consumption is only 217 μW. Also, this circuit architecture increases port-to-port isolations to above 140 dB. Moreover this mixer is suitable for broadband applications.

Keywords:

low-power , low-voltage , subthreshold , mixer , CMOS