Evaluation of Cache Coherence Protocols in terms of Power and Latency in Multiprocessors

The shared memory multiprocessors suffer with significant problem of accessing shared resources in a sharedmemory it will result in longer latencies. Consequently, the performance of the system will get affected. Withthe object of solving the problem of increased access latency due to large number of processors with sharedmemory, Cache is being used. Every processor has its own private cache, now they can update or access thedata comfortably but again it leads to another serious issue i.e. cache coherency. The magnitude of the potentialperformance difference between the various cache coherency approaches indicates that the choice of coherencesolution is very important in the design of an efficient shared-bus multiprocessor, since it may limit the numberof processors in the system. In this paper we evaluate a typical multiprocessor system in terms of power andlatency with different cache coherence protocols which GEM5 simulator is used. The traffic is generated withfive injection rates (0.1, 0.2, 0.3, 0.4 and 0.5). Power and latency analyzing figures make up and appear inexperimental result. The result shows MOESI_CMP_token has maximum latency and power consumption.

Keywords:

Multiprocessor , Cache coherency Protocols , Power , Latency