M. Gholami - Faculty of Engineering and Technology, University of Mazandaran, Babolsar, Iran
R. Binaei - Department of Electrical and Computer Engineering, Mazandaran Institute of Technology, Babol, Iran
M. Gholamnia Roshan - Department of Electrical and Computer Engineering, Mazandaran Institute of Technology, Babol, Iran

The electronic industry has grown vastly in recent years, and researchers are trying to minimize circuits delay, occupied area and power consumption as much as possible. In this regard, many technologies have been introduced. Quantum Cellular Automata (QCA) is one of the schemes to design nano-scale digital electronic circuits. This technology has high speed and low power consumption, and occupies very little area. Phase-locked loops (PLLs) and delay-locked loops (DLLs) are blocks that are commonly used in telecommunication applications. One of the most important parts in DLL and PLL is the phase-frequency detector. Therefore, the design of this circuit in QCA technology is of great importance. In this paper, two new phase-frequency detectors sensitive to falling and rising edge have been introduced in QCA technology. Both of the designs are composed of 104 cells; occupy only 0.13 μm2 of an area and 1.5 QCA clock cycles latency. The designs are in one layer and all the inputs and outputs are available to be used by another circuit.

Quantum Cellular Automata, Quantum-dot Cellular Automata, Phase-frequency Detector, Phase detector, Power Consumption