Design and Simulation of a Nano Mixed Signal Fuzzy Logic Controler Chip

Presented in this paper is design of a new FLC (FUZZY LOGIC CONTROLLER) chip with mixed-signal input and analog output.The analog fuzzy engine is based on a novel current-mode CMOS circuit used for the implementation of fuzzy partition membership functions. These membershipfunctions are simply tunable by setting some voltages and currents on IC pins. Input has three membership functions and output is five singleton membership functions.. The controller is tested for two inputs, one output, and nine tunable fuzzy rules. The proposed circuit was laid out standard 0.35μm CMOS technology. Post layout simulation from extracted circuit was performed for a 1.5V single power supply voltage using HSPICE software. Power consumption of circuit is 10.2mW.

Keywords:

CMOS , fuzzification , FLC chip , min operator , nonlinear systems , current mode circuits