Evolving an MPEG2 Processor from a JPEG Object-Oriented ASIP: A Case Study on a System-Level Design Methodology

In order to design embedded systems that are quickly (i.e.without hardware remanufacturing) and easily (i.e. by software programming) extended and/or upgraded, the ODYSSEY methodology advocates designing an application-specific instruction-set processor (ASIP) tailored the applicationdomain being supported; this ASIP can then be programmed to add missing functionalities and/or to correct malfunctioning parts. This suggests capturing the basic operations of the target application-domain in an ASIP that is extensible by programming. In the domain of image (de)compression applications, the JPEG algorithm is the base of many image (de)compression algorithms, including MPEG2 moving picture one. To evaluate the ODYSSEY implementation approach, we present a case study in which we program the ASIP that we had developed tailored to JPEG decompression and implemented the MPEG2 baseline video-stream decoding algorithm. The implementation platform is a VirtexII-Pro FPGA. The hardware part is implemented in FPGA logic blocks, and software runs on a PowerPC processor. Experimental results show that the ASIP structure suggested by ODYSSEY is comparable to other hardware-software implementations while the toolset provided in ODYSSEY effectively reduces development time.

Keywords:

System-Level Design , ASIP , JPEG , MPEG2