Filter Amplitude Locked Loop for Data Receivers

A CMOS band pass filter amplitude locked loop isproposed using a wide range variable gain amplifier, suitable forclock and data recovery in the receiver side of the high-speeddata transmission systems. The suggested circuit is able mainly tocancel out the Co-Channel Interference in the transmissionchannels. The main amplifier/filter part is controlled from twosources both for the middle frequency of the band pass filter and,from the amplitude locking loop for amplitude tuning. The filteralso is considered to have digital inputs to coarse tuning andanalog input for fine tuning of the bandwidth. Simulations aredone in TSMC ۰.۱۸um standard CMOS technology, and thelocking loop is able to correct the signal amplitude in frequencyrange of ۱GHz to ۴GHz along with its filtering property. Theproposed circuit correctness is tested for a received ۴- level PAMsignal. The whole loop dissipates about ۲۰mw from a ۱.۸V powersupply.

Keywords:

ALL , VGA , peak-detector , Band pass filter , PLL