Ehsan Kargaran - Microelectronic Laboratory, Sadjad Institute of Higher Education, Mashhad, Iran
Saber Izadpanah Tous
Mohammad Mahdi Ravari
Ali Reza Dehqan

In this paper, design and simulation results of a fully integrated 5-GHz CMOS LNA is presented. To design this LNA, the parasitic input resistance of a MOSFET is converted to 50Ω by a simple L–C network, hence eliminating the need for source degeneration. As it is analytically shown, this is because the former methods enhance the gain of the LNA by a factor that is inversely proportional to MOSFET’s input resistance. By employing the current reuse and forward body bias technique, the proposed LNA can operate at reduced supply voltage and power consumption. The proposed LNA delivers a power gain (S21) of 12.6 dB with a noise figure of 3.9 dB, while consuming only 450μW dc power with an ultra low supply voltage of 0.5V. The power consumption figure of merit (

Forward body bias, low noise amplifier (LNA), current reuse,ultra low power, ultra low voltage,parasitic input resistance