Reduced Memory Requirement in Hardware Implementation of SVM Classifiers
Publish place: 20th Iranian Conference on Electric Engineering
Publish Year: 1391
نوع سند: مقاله کنفرانسی
زبان: English
View: 1,164
This Paper With 5 Page And PDF Format Ready To Download
- Certificate
- من نویسنده این مقاله هستم
استخراج به نرم افزارهای پژوهشی:
شناسه ملی سند علمی:
ICEE20_060
تاریخ نمایه سازی: 14 مرداد 1391
Abstract:
Support Vector Machine (SVM) is a powerful machine-learning tool for pattern recognition, decision making and classification. SVM classifiers outperform otherclassification technologies in many applications. In this paper, two implementations of SVM classifiers are presented using Logarithmic Number System. In the basic classifier alloperations (multiplication, addition and …) are performed using logarithmic numbers. In the logarithmic domain,multiplication and division can be simply treated as addition or subtraction respectively. The main disadvantage of LNS is the large memory requirement for high precision addition andsubtraction. In the improved classifier, multiplication operation is performed using logarithmic numbers, but addition andsubtraction operations are performed with linear fixed point numbers. In this research a lookup table and a shifter are usedto convert LNS numbers to fixed point numbers. The required memory of the improved classifier is 197 times less than the required memory of the basic system without any degradation ofthe SVM classification accuracy
Keywords:
Authors
Siamak Esmaeeli
Department of Electrical Engineering,Sharif University of Technology
Iman Gholampour
Electronics Research InstituteSharif University of Technology
مراجع و منابع این Paper:
لیست زیر مراجع و منابع استفاده شده در این Paper را نمایش می دهد. این مراجع به صورت کاملا ماشینی و بر اساس هوش مصنوعی استخراج شده اند و لذا ممکن است دارای اشکالاتی باشند که به مرور زمان دقت استخراج این محتوا افزایش می یابد. مراجعی که مقالات مربوط به آنها در سیویلیکا نمایه شده و پیدا شده اند، به خود Paper لینک شده اند :