A Novel Si/SiGe Hetero Structure for Simultaneously Reduction of Bias Voltages and Off Current in Nanoscale I-MOS Devices

Scaling of Metal-Oxide-Semiconductor Field Effect Transistor (MOSFET) is reaching its physical limits due to several phenomena including the theoretical limitation of subthreshold swing, which is due to thermal diffusion of carriers. In order to reduce the subthreshold swing, a new structure called IMOS (Impact Ionization MOS) was introduced by Gopalakrishnan et al. in 2002 [1]. Employing the impact ionization mechanism in IMOS devices necessitated use of large bias voltages which hampered device reliability and power consumption. Thus, challenges lie ahead primarily in reducing the breakdown voltage of IMOS device to enable further scaling of the supply voltages. Threshold energy is closely related to the bandgap energy. Thus, a fundamental solution for the breakdown voltage reduction is to use a small bandgap material. Earlier, we showed that, employing Si1-XGeX as a channel material leads to significant reduction in bias voltages for single gate IMOS structure [2]. However, this technique resulted in an increase in off-state current. The structure proposed in this paper not only allows further reduction in bias voltages, but also reduction in off-state current