himanshu chaudhari - Department of Electrical Engineering, SVNIT, Surat, India
Pranav Darji - Department of Electrical Engineering, SVNIT, Surat, India

In this article, asymmetrical modular multilevel converter (A-MMC) topology using mixed cell (SM) with DC-side fault blocking capability and the reduced component count is proposed. The mixed cell submodule is made up of a full-bridge (FB-SM) and a half-bridge (HB-SM) with asymmetric capacitor voltage based on geometric propagation (GP) ratio. Each mixed cell submodule can generate a maximum of four output voltage levels with binary GP ratio and five output voltage levels with ternary GP ratio using six controlled switches and two asymmetric capacitors. The proposed A-MMC topology requires nearly half the number of components and voltage sensors compared to conventional topologies. This will result in simpler control structure of A-MMC with DC fault blocking capability. A voltage balancing algorithm based on normalization is used for capacitor voltage balancing and a hybrid pulse width modulation (H-PWM) technique to generate gating signals. Detailed operational concepts of the proposed topology, the pre-charging process of a capacitor, and performance with different modulation indexes are discussed in length. A detailed simulation model of A-MMC under different operating conditions is carried out using MATLAB/SIMULINK environment. To show the benefits of mixed cell SM, a comparison between the proposed mixed cell and other existing cells is presented in detail. The simulation results analysis show effectiveness of proposed schemes over other schemes presented in literature.

Asymmetrical Modular Multilevel Converter (A-MMC), HVDC system, Mixed Cell, Hybrid modulation technique, Reduced Component Count, DC Fault Blocking Capability