A. Seifi - Mohaghegh Ardabili University, Ardabil, Iran‎
M. Hoseinpour - Mohaghegh Ardabili University, Ardabil, Iran‎
M. DejamKhoy - Mohaghegh Ardabili University, Ardabil, Iran.‎
F. Sedaghati - Mohaghegh Ardabili University, Ardabil, Iran.‎

In this paper, a multilevel inverter has been designed and improved in order to lower the number of switching devices, especially when the number of level of the output power is large. The input to the inverter comes from internal direct current (DC) resources which are interconnected via the power circuit breaker. Compared to the classical topologies and similar designs, the proposed method needs lower number of switching device to provide the same power levels at the output. As a precursor, we have drawn the desired topology for a ۹-level power level. The procedure can be completed using switching by a phase shift keying techniques, which in addition, make practical output power with higher number of levels. The proposed topology has been tested against topologies of the power class ۱ and/or similar classes, based on the simulations in the MATLAB/Simulink environment. The results of the simulation deemed to be promising for future networks.

Total Harmonic Distortion (THD), Multi-Level Inverter (MLI), device reduction, classical topology.‎