Majid Jalalifar
Mohammad Yavari
Farshid Raissi

This paper presents a dual-active capacitance in reversed nested Miller compensation (DACRNMC) technique for low-voltage and large capacitive load amplifiers. The frequency bandwidth of the DACRNMC amplifier has been improved due to the usage of active compensation capacitors. The amplifier's die area is reduced in compare to the existing techniques in the RNMC scheme. The architecture also generates two left half plane zeros to increase the phase margin. The simulation for the proposed DACRNMC amplifier with a ۰.۱۸µm standard CMOS process reveals a unity gain bandwidth of ۱۷.۴MHz and phase margin  of ۶۴ degrees , while ۵۰۰ pF load is driven  from a single ۱.۵V power supply.

CMOS multistage amplifiers, en, Nested Miller compensation, active capacitive feedback