Dynamic Context Memory in Reconfigurable Superscalar Processors

In this paper, dynamic context memory in reconfigurable superscalar processor is suggested. These architecture uses trace cache to update the contexts in context memory, which is dynamically changed according to trace cache lines. The contexts in context memory are configured uring execution of the program. This method is called Dynamic Context Memory; DCM DCM decrease the time of reconfiguration of contexts. Simplescalar tool set is used for simulation to evaluate the performance of a . superscalar processor who uses DCM. The simulation results show the IPC of superscalar processor is improved by 1 I-25% for different applications.

Keywords:

trace cache , reconfigurable processor , configuration selection , context memory , hit rate