Representing a new adder in One-hot Residue Number System

In many arithmetic circuits such as adders, the flow of carry bit from the least significant bit to the most, causes reducing speed and the performance of the circuit.Residue Number System (RNS) is an appropriate system for fast and parallel arithmetic operation. This speed increases if One-Hot Residue (OHR) number system is used. There are problems in OHR with area and hardware consumption, when modules are large or result of variousarithmetic operation is needed.The problem of carry bit is solved in OHRNS to some extent. There are two concerns related to the application of this Number System: reaching the most possible speed and the largest dynamic range. There is a conflict when one wants to resolve both these problem. That is augmenting the dynamic range results in reducing the speed in the same time.In this paper a novel design of one-hot adder is represented for reducing hardware consumption and the size of circuit. This circuit is useable for Multiple Valued Logic module, in comparison to other RNS design; this circuit has considerably improved the number of transistors and power consumption

Keywords:

Residue Number System(RNS) , One-Hot , Computer Arithmetic