Nina Keshvarinia - Integrated Systems Lab., Department of Electrical Engineering Imam Reza (P.B.U.H) University Mashhad, Iran
Samaneh Babayan-Mashhadi - Integrated Systems Lab., Department of Electrical Engineering Imam Reza (P.B.U.H) University Mashhad, Iran

In this paper, a new low-power, high-speed track-and-hold amplifier (T/H) has been presented which has been optimized to be used in high resolution time-interleaved analog-to-digital converters (ADCs). Taking advantage of using power-switching technique and improved source-follower (SF), a low-power, linear T/H amplifier has been designed. Simulation results in 0.18μm CMOS technology shows that with a differential input signal of 20MHz and 0.8Vpp, the T/H achieves total harmonic distortion of -57.8dB at sampling frequency of 100MHz. Besides, while driving a 1pF capacitive load, the T/H consumes 1 mW from the 1.2 V supply.

Track-and-hold amplifier, Low-power design, time-interleaving track-and hold amplifiers