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Implementation of a Unified DSP Coprocessor

عنوان مقاله: Implementation of a Unified DSP Coprocessor
شناسه ملی مقاله: JR_IJMEC-2-2_002
منتشر شده در شماره 2 دوره 2 فصل Jan در سال 1391
مشخصات نویسندگان مقاله:

Mojdeh Mahdavi - Department of Electronics, Shahr Qods Branch, Islamic Azad University, Tehran, Iran

خلاصه مقاله:
Utilizing the DFT, the DHT, the DCT or the DST is an obvious choice in signal processing domain. This paper describes the implementation of a unified coprocessor of transform length '8' for the synchronous design in XC3S1400AN-4FG484 FPGA device of Xilinx Company. The operating frequency of 20 MHz is achieved. The paper presents the trade-offs involved in designing the architecture, the design for performance issues and the possibilities for future development.

کلمات کلیدی:
Coprocessor, Discrete Transforms, Implementation

صفحه اختصاصی مقاله و دریافت فایل کامل: https://civilica.com/doc/443274/