Sayed Ali Seif Kashani - ECE Department Kashan University Kashan, Iran, ۸۷۳۱۷۵۱۱۶۷
Hossein Karimiyan Alidash - ECE Department Kashan University Kashan, Iran, ۸۷۳۱۷۵۱۱۶۷
Sandeep Miryala - Electronics Technology Department National Institute of Sub Atomic Physics (Nikhef) Amsterdam, Netherlands, ۱۰۹۸ XG

Due to physical limitation of Silicon based CMOS further scaling of MOS device has become a complicated task and research community is investigating on post-Silicon materials and Graphene based devices seems to be a viable candidate for future VLSI industry.In this paper a Graphene Re-configurable Gate (RG) is used in designing Configurable Logic Block (CLB) which is the basic unit in all FPGA’s. In this paper we also characterize the CLB’s internal elements i.e. Latch and D-Flip-Flop (DFF). Characterization results show that RG based CLB has 58x more speed in comparison with silicon based CLB. This paper also summarizes the timing characterization information of RG based CLB.

Graphene; CLB, FPGA, Reconfigurable Gate and D-Flip-Flop