A Reliable Full-Swing and High-Performance CLRCL Full Adder
Publish place: The first international conference of modern research engineers in electricity and computer
Publish Year: 1395
نوع سند: مقاله کنفرانسی
زبان: English
View: 492
This Paper With 8 Page And PDF Format Ready To Download
- Certificate
- من نویسنده این مقاله هستم
استخراج به نرم افزارهای پژوهشی:
شناسه ملی سند علمی:
CBCONF01_0734
تاریخ نمایه سازی: 16 شهریور 1395
Abstract:
Full adder cell is the basic building block invarious digital circuits. In this paper, a new full-swing and highperformance16-Transistor full adder based on complementaryand level restoring carry logic (CLRCL) structure is presented.We have only used two modules to build our proposed circuit,low-power XNOR (LP-XNOR) gate and transmission-gate (TG)based 2-to-1 multiplexers. Simulation results in 180-nm and 90-nm CMOS technologies using HSPICE simulator prove our newdesign low-power consumption as well as reliable operation incomparison with some previously reported full adders. We havegained 8%-57% (1%-51%) and 6%-59% (10%-70%)enhancement in terms of power consumption and Power-DelayProduct (PDP), respectively at 180-nm (90-nm) technology for1.8v (1v) supply voltage.
Keywords:
Authors
Majid Amini Valashani
Department of Electrical Engineering and Electronics Research Center Iran University of Science and echnologyTehran, Iran
Soodeh Aghlimoghaddam
Department of Electrical Engineering and Electronics Research Center Iran University of Science and echnologyTehran, Iran
مراجع و منابع این Paper:
لیست زیر مراجع و منابع استفاده شده در این Paper را نمایش می دهد. این مراجع به صورت کاملا ماشینی و بر اساس هوش مصنوعی استخراج شده اند و لذا ممکن است دارای اشکالاتی باشند که به مرور زمان دقت استخراج این محتوا افزایش می یابد. مراجعی که مقالات مربوط به آنها در سیویلیکا نمایه شده و پیدا شده اند، به خود Paper لینک شده اند :