Majid Amini Valashani - Department of Electrical Engineering and Electronics Research Center Iran University of Science and echnologyTehran, Iran
Soodeh Aghlimoghaddam - Department of Electrical Engineering and Electronics Research Center Iran University of Science and echnologyTehran, Iran

Full adder cell is the basic building block invarious digital circuits. In this paper, a new full-swing and highperformance16-Transistor full adder based on complementaryand level restoring carry logic (CLRCL) structure is presented.We have only used two modules to build our proposed circuit,low-power XNOR (LP-XNOR) gate and transmission-gate (TG)based 2-to-1 multiplexers. Simulation results in 180-nm and 90-nm CMOS technologies using HSPICE simulator prove our newdesign low-power consumption as well as reliable operation incomparison with some previously reported full adders. We havegained 8%-57% (1%-51%) and 6%-59% (10%-70%)enhancement in terms of power consumption and Power-DelayProduct (PDP), respectively at 180-nm (90-nm) technology for1.8v (1v) supply voltage.

full adder; CLRCL adder; low-power; full-swing