Fabrication of Nano-porous silicon by electrochemical etch of high resistivity silicon wafer

Porous silicon (PS) has attracted much attention as promising semiconductor materials for optical and electronic device applications. [1,2]. Electrochemical anodic etching method is an effective techniqueto produce uniform pores on the surface of P-type silicon wafer. Several parameters are used tooptimize the characterization of surface of a porous layer, such as etching time, current density and concentration of etching solution [3,4,5]. In this research, resistance effect on two wafers with resistivity10 Ω.cm and 0.04Ω.cm was investigated in constant conditions.Methods Firstly, the both wafer cleaned by RCA method. Then a Silver thin film coating deposited on backside P-type Si- wafer by using DC Sputtering (PVD – DSR1, IRAN). The electrolyte solution was HF: EtOH: H2O withvolume ratio 1:2:2. A Teflon cell electrochemistry was used for the electrochemical etching process. The Siwafer <100> as positive electrode connected on power supply under constant current density mode. A 40 mA constant current density and 10 min of etching time duration at the same conditions were applied to both wafers. The shape and size of pores were observed under FESEM (Field Emission Scanning ElectronMicroscopy) analysis.Results and discussion The fabrication of PSs was done by electrochemically etch when a constant current was applied to the both wafers and potential profile changes with time for 10 min. were plotted in figure 1. The range of potentialvariation is between 153.4 V to 116.8 V for 10Ω.cm resistance wafer, while the range of potential variation for 0.04Ω.cm resistance wafer is between 84 to 62.4 V. The samples morphologies were studied also by FESEM analysis. Figure 2-a shows that the 40mA current is applied to the wafer surface with lower resistance leads to an initial rupture formation, then over the time thehoneycomb cavities with very low depth and average pores diameter of 336.49 nm (figure 2-b) have been formed. While high resistance wafer under the same conditions in the nanometer range is porous. The pore diameters observed are between 14.37 to 97.48 nm that show good porosity (Figure 2-c)

Keywords:

Porous Silicon , Electrochemical Etch , Nano-Porosity , FESEM