Reviews of Defect Tolerance for Nano-arrays

The prospect on nano-array based circuits are balanced by serious subjects related to reliability. At the present time, nanowires and active devices cannot depend on a mature technology and high rates of defects are yet to be expected. Crossbar architectures are one method to molecular electronic circuits for memory and logic applications. Defect tolerance techniques are necessary to obtain an acceptable manufacturing yield. This paper reviews an approach to building defect-tolerant, nanoscale compute fabrics out of assemblies of defective crossbars of configurable FETs and switches.

Keywords:

Defect , Nanoarray , Percolation , Realiability