Designing a Novel Nano-Metric Reversible n-Bit Signed-Magnitude Adder/Subtractor

Publish Year: 1395
نوع سند: مقاله کنفرانسی
زبان: English
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شناسه ملی سند علمی:

COMCONF03_369

تاریخ نمایه سازی: 6 اردیبهشت 1396

Abstract:

The reversible logic is the new generation of circuits considered as one of the major scientific issues in today s world. Nowadays, reversible circuits are widely studied due to their advantages such as zero energy dissipation, retaining the information, zero heat dissipation and one to one correspondence between the inputs and outputs over traditional irreversible circuits. These circuits have some main applications, for instance, in nanotechnology-based systems, quantum computing and low power CMOS design. In this paper, a novel reversible four-bit signed-magnitude adder/subtractor is proposed which could be extended for reversible n-bit signed-magnitude adder/subtractor. Also, a new gate is introduced which is applied as a multiplexer. Then, the proposed reversible n-bit signed-magnitude adder/subtractor is evaluated and formulated in terms of reversible gate count, number of garbage outputs, number of constant inputs, quantum cost and hardware complexity. We also propose an optimized reversible signed-two’s complement adder/subtractor and the overflow detection circuit in [-2^(n-1),2^(n-1)-1]. All the scales are in nano-metric area.

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Authors

Nayereh Hosseini Nia

Department of computer Engineering, Payame Noor University, PO Box 19395-3697 Tehran, Iran

Soudabeh Boroumand

Young Researchers and Elite Club, Tabriz Branch, Islamic Azad University, Tabriz, Iran

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