N.M Dyamannavr - Govt. Engineering College Engineering Kushalnagar, Karnataka, India
N.G kurahatti - East point College of Engineering and Technology ,Bangalore Karnataka, India
A Christina - Govt. Engineering College Engineering Kushalnagar, Karnataka, India

In this paper, an Ultra High Frequency (UHF) base band processor for a passive Tag is presented. It proposes a Radio Frequency Identification (RFID) tag digital base band architecture which is compatible with the EPC C C2/ISO18000-6B protocol. Several design approaches such as clock gating technique, clock strobe design and clock anagement are used. In oder to reduce the area Decimal Matrix Code (DMC) Technique is used.The digital base band processor has been simulated and implemented using Xilinx latform. The complete design is verified and tested on Spartan-6 Field Programmable Gate Array (FPGA) board. The performance of system is measured in terms of power. The Synthesis result shows that, the power required for complete design of digital baseband processor is 5mW on a supply voltage of 1.2V

Radio Frequency Identification,base band Processor,Hardware Descriptive Language,Field Programmable Gate Array