Investigation of a SiGe Tunnel FET: Comparison to Si and Ge TFETs

In this paper a SiGe p+n+in+ tunneling transistor is studied and compared with Si and Ge based transistors. Moreover, in the proposed structure a -doped n+ region is considered between the source and the channel, and this region is optimized in the sense of region width (Wd) and doping level for the highest ratio of on-current to off-current and the lowest sub-threshold swing. Simulations show that Ion/Ioff ratio greater than 11 order of magnitude and sub-threshold swing of 16.6 mv/dec, which is well below 60 mv/dec limit of conventional MOSFETs, are obtained.

Keywords:

Tunnel FET ,