A rapid model for implementing two dimension discrete cosine transform in Image processing

Discrete cosine transform is one of the signal frequency transform in which it has numerous usage in image processing. This transform benefits from simple calculation, it removes negative frequency components, and the image’s energy is calculated from the zero frequencies. In this paper, in addition to be familiar with this transformation, a fast model is used in order to implement two dimensional of this transform. Then, this proposed algorithm is implemented on the specific image with the size of 128*128 pixels. The results show the high-speed computing and also appropriate accuracy. The chosen hardware for implementing has been considered from Virtex6 family with XC6VLX75T core and SF484 package.

Keywords:

Discrete cosine transform , Image Compression , Matrix Multiplication , FPGA , and VHDL