Fault tolerant full adder design based on GDI technique

In modern computational systems, transients errors becomes moreimportant since processing units are mainly consist of small devicesas we know a transitional error can be generate by electromagneticnoise, cosmetic rays and so play noise in this work, we proposed afault tolerant full adder exploiting gate diffusion input GDI. Thepresented architecture is able to detect and revise permanent errors, inaddition exploding GDI techniques allows working in low powerregime and reducing propagation delay while shrinking dye area. Alsosimulation results verifies excellency of proposed work.In recent years, fault tolerant circuit are very important in manyapplications, especially when the automatic presider is desirable.Space application, defense surveillance, medical supervisory system,military application and other safety related services are included incritical applications. The Faults existence in many Applications raisethe destruction potential of the overall system, on the other hand, thecomplexity of integrated circuits is increasing with the advancementof technology. While Technology advancement leads to shrinkingintegrated circuits size. This means the output design is more sensitiveand tangible to the transient fault. These faults are mainly originatefrom electromagnetic noises cosmic rays, cross-talk and power supplynoise. Needless to say that compact design due to fabricationadvancements increases the potential of hardware failure.