A New Ternary Memory Cell Based on CNTFETs Using Forced Stack Technique

In this paper, we first designed a new ternary inverter gate with Forced Stack (FS) technique using CNTFETs,called FS-STI, then with using cross-coupled two FS-STI inverters, a new ternary memory cell based on CNTFETtransistors presented. In the new memory cell, a ternary buffer gate has been used in addition to using FS-STI inverters.Simulation results indicated that power consumption of proposed memory cell in read and write operations is less thanthe conventional ternary memory cell. Also, standby power of proposed ternary memory cell is improved compared toother types. Instead, delay in read and write operations of proposed ternary memory cell increased. But, power delayproduct of the proposed memory cell improved compared to conventional memory cell.

Keywords:

CNTFET , SRAM , Forced Stack , Power consumption