HAFC : Hardware Accelerated Fog Computing in Artificial Neural Network Applicationsed by FPGA accelerators

Using fog computing enhanced with FPGA accelerators, this paper presents some improvements in the performance of face recognition applications. In this paper rather than sending all data to a cloud layer, only the calculations of FPGA will be sent to the layer. Moreover, an edge processing architecture, consisting of an FPGA module and control cameras is offered due to the limited processing power of fog nodes. Convolutional neural network and deep learning algorithms are adopted to implement face recognition applications that are used to authenticate, identify and track faces, etc. which are resource-intensive tasks. To evaluate the performance of the proposed system some criteria such as runtime, energy consumption, amount of data posted to the cloud, and workload are selected. The test results show a runtime improvement of up to 31 times over an AMD Opteron single-core processor for a slight increase in power consumption and computational overhead. IFogSim software and Virtex-5 LX330T FPGA are used for simulation. Results confirm that the use of fog computing for face recognition significantly reduces the size of posted data to the cloud. It also shows that the hardware accelerator makes the face recognition process more efficient.

Keywords:

Internet of Objects , IoT , face recognition , Convolutional Neural Network , FPGA , Fog computing