F. Farzaneh - P.H.D Candidate of Computer Science and Engineering Shahid Behshti University, G.C. Tehran, Iran
K. Navi - Faculty of Computer Science and Engineering Shahid Behshti University, G.C. Tehran, Iran

Down-scaling in CMOS technology has been faced some critical challenges. The most important issue is the increment of power consumption because of leakage currents. One of the innovative methods as an alternative technology to CMOS transistors is NanoMagnetic Logic (NML). NML is intrinsically non-volatile, low power, radiation resistant and capable of operating at room temperature. In this paper, we employ a novel design of three dimension and majority-based full adder with in-plane NML (iNML). The proposed full adder makes signal routing more comfortable and has improved footprint due to its three dimension data propagation. We simulate and analyze the proposed NML full adder based on HDL models and compare to previous full adders to highlight its improvements of circuit performance parameters.

Nanotechnology, in-plane NanoMagnetic Logic (iNML), 3D Circuits, Field Coupled Computing, MQCA, Low Power.