Design and Implementation of UART with configurable baud rate Based on VHDL

Universal asynchronous receiver-transmitter (UART) is one of the simplest and oldest forms of device-to-device digital communication. You can find UART devices as a part of integrated circuits (ICs) or as individual components. UARTs communicate between two separate nodes using a pair of wires and a common ground.UART which is the kind of serial communication protocol which allows the full duplex communication in serial link.UART includes three kernel modules which are the baud rate generator, receiver and transmitter. The UART implemented with Very High Speed Integrated Circuit Hardware Description Language(VHDL) language can be integrated into the field-programmable gate array (FPGA) to achieve compact, stable and reliable data transmission. This paper presents implementation of UART with configurable baud rate. Also we can verify the output using LED’s on spartan 6 board. The total number of slice required is less than 0.5%. The number of slice Flip Flops are 0.23%, the total number of 4 input lookUp tables (LUTs) are 0.43% and the number of bounded iput-output blocks (IOBs) are 5%. This design has a small resource.

Keywords:

UART , Asynchronous serial communication , VHDL , Xilinx ISE Design , Serial communicatio , Configurable baud rate