Optimization of a New Extended Cascaded Multilevel Inverter Topology to Reduce DC Voltage Sources and Power Electronic Components
Publish place: International Journal of Industrial Electronics, Control and Optimization، Vol: 4، Issue: 4
Publish Year: 1400
نوع سند: مقاله ژورنالی
زبان: English
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شناسه ملی سند علمی:
JR_IECO-4-4_009
تاریخ نمایه سازی: 20 تیر 1401
Abstract:
This work proposes a new multilevel inverter consisting of basic and submultilevel units. The basic unit is made-up of four isolated dc voltage sources, two bidirectional switches and ten unidirectional switches. To increase the number of the output voltage levels, a cascaded architecture based on series connection of sub-multilevel is proposed. The proposed inverter utilizes two algorithms to determine the values of dc voltage sources. Number of IGBTs, dc voltage sources, gate driver circuits, variety of dc voltage sources and peak standing voltage on the switches are calculated and their optimization to produce maximum number of levels in output voltage is investigated. To examine advantages of the proposed inverter, the topology is compared with other topologies. The results show superiority of proposed topology over most conventional topologies, in number of circuit components. Finally, to confirm the performance of the proposed multilevel inverter, experimental results of a ۲۵-level inverter prototype are provided.
Keywords:
Multilevel inverters , Cascaded multilevel inverters , Optimization , Symmetric and Asymmetric multilevel inverters , Total standing voltage
Authors
Roya Naderi
Department of Electrical Engineering, Shabestar Branch, Islamic Azad University, Shabestar, Iran
Ebrahim Babaei
University of Tabriz
Mehran Sabahi
University of Tabriz
Ali Daghigh
Department of Electrical Engineering, Shabestar Branch, Islamic Azad University, Shabestar, Iran
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