Analysis and Design of a High Performance Radix-۴ Booth Scheme in CMOS Technology
Publish place: Telecommunication devices، Vol: 10، Issue: 2
Publish Year: 1400
نوع سند: مقاله ژورنالی
زبان: English
View: 178
This Paper With 7 Page And PDF Format Ready To Download
- Certificate
- من نویسنده این مقاله هستم
استخراج به نرم افزارهای پژوهشی:
شناسه ملی سند علمی:
JR_TDMA-10-2_003
تاریخ نمایه سازی: 11 اسفند 1401
Abstract:
In this paper, a novel high performance structure has been demonstrated which can be widely used for circuit-level realization of radix-۴ Booth scheme. The notable privilege of proposed scheme is its higher speed for generation of Partial Products (PPs) compared to the previous designs. The objective has been achieved by means of the modified truth table of Booth algorithm. Moreover, Pass-Transistor Logic (PTL) has been employed to reduce the middle stage capacitances which has considerably enhanced the operating frequency of the designed architecture. The thorough analysis over previously reported works has also been provided to help the authors for optimized implementation of the Booth circuitry. Simulation results for TSMC ۰.۱۸µm CMOS technology and ۱.۸V power supply using HSPICE indicate the correct operation of the proposed scheme. In addition, the best-reported works have been redesigned and simulated on the same conditions to provide a fair comparative environment with our designed scheme. The results demonstrate the superiority of our circuit over the selected structures.
Keywords:
Authors
Ali Rahnamaei
Department of Electrical Engineering, Ardabil Branch, Islamic Azad University, Ardabil, Iran.
مراجع و منابع این Paper:
لیست زیر مراجع و منابع استفاده شده در این Paper را نمایش می دهد. این مراجع به صورت کاملا ماشینی و بر اساس هوش مصنوعی استخراج شده اند و لذا ممکن است دارای اشکالاتی باشند که به مرور زمان دقت استخراج این محتوا افزایش می یابد. مراجعی که مقالات مربوط به آنها در سیویلیکا نمایه شده و پیدا شده اند، به خود Paper لینک شده اند :