A Low Noise Amplifier with Low Voltage, Low Power Consumption, and Improved Linearity at ۵ GHz
Publish place: majlesi Journal of Electrical Engineering، Vol: 11، Issue: 1
Publish Year: 1396
نوع سند: مقاله ژورنالی
زبان: English
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شناسه ملی سند علمی:
JR_MJEE-11-1_009
تاریخ نمایه سازی: 12 شهریور 1402
Abstract:
In this paper a low-noise amplifier with ۰.۶ V supply voltage, low power consumption, and improved linearity at= ۵ GHz is introduced in ۰.۱۸ µm CMOS technology. By using a feed-forward structure and a multi-gated configuration in the proposed circuit, linearity of the circuit is significantly improved, while only ۱۲۲ µW more power is consumed compared to conventional folded cascode structure, and the other circuit parameters are similar. In addition, the Volterra series is used for nonlinear analysis and to evaluate the linearity improvement of the proposed circuit. There is also a noteworthy superiority over compared published works in the figure of merit. The suggested low-noise amplifier (LNA) at ۱.۲۸ mW DC power consumption provides ۹.۶ dB gain and a noise figure of ۳.۲۴ dB. It is achieved whilst the third order interception point has been improved by ۱۰ dB and equals ۰.۰ dBm. In the operating frequency the circuit displays satisfactory input and output impedance matching. Finally, throughout the whole circuit bandwidth input and output isolation is below −۲۷ dB.
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Authors
Amin Zafarian
Electrical Engineering Department, Islamic Azad University Branch Of Arak, Iran
Iraj Kalali Fard
RWTH Aachen University
Abbas Golmakani
Department of Electrical Engineering, Sadjad University of Technology, Mashhad
Jalil Shirazi
Electrical Engineering Department, Islamic Azad University Branch Of Gonabad, Iran Country Iran
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