Enhancing High-Performance Computing: A Comprehensive Study on Dual-Doped Source/Drain Reconfigurable Field Effect Transistor
Publish Year: 1403
نوع سند: مقاله ژورنالی
زبان: English
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شناسه ملی سند علمی:
JR_JECEI-12-2_014
تاریخ نمایه سازی: 15 مرداد 1403
Abstract:
kground and Objectives: In this study, a reconfigurable field-effect transistor has been developed utilizing a multi-doped source-drain region, enabling operation in both n-mode and p-mode through a simple adjustment of electrode bias. In contrast to traditional reconfigurable transistors that rely on Schottky barrier source/drain with identical Schottky barrier height, the suggested device utilizes a straightforward fabrication process that involves physically multi-doped source and drain. The proposed structure incorporates a bilayer of n+ and p+ in the source and drain regions.Methods: The device simulator Silvaco (ATLAS) is utilized to conduct the numerical simulations.Results: The transistor exhibits consistent transfer characteristics in both modes of operation. The influence of key design parameters on device performance has been analyzed. A notable aspect of this transistor is the integration of an XNOR logic gate within a single device, rendering it suitable for high-performance computing circuits. The findings indicate that on-state currents of ۱۴۲ µA/µm and ۵۷.۲ µA/µm, along with on/off current ratio of ۸.۶۸×۱۰۷ and ۳.۵×۱۰۷, have been attained for n-mode and p-mode operation, respectively.Conclusion: A single-transistor XNOR gate design offers potential advantages for future computing circuits due to its simplicity and reduced component count, which could lead to smaller, more energy-efficient, and potentially faster computing systems. This innovation may pave the way for advancements in low-power and high-density electronic devices.
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Authors
Z. Ahangari
Department of Electronic, Yadegar- e- Imam Khomeini (RAH) Shahr-e-Rey Branch, Islamic Azad University, Tehran, Iran.
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