Detailed Study of the Time Estimation in Level-Crossing Analog-to-Digital Converters
Publish place: 21th Iranian Conference on Electric Engineering
Publish Year: 1392
نوع سند: مقاله کنفرانسی
زبان: English
View: 1,009
This Paper With 6 Page And PDF Format Ready To Download
- Certificate
- من نویسنده این مقاله هستم
استخراج به نرم افزارهای پژوهشی:
شناسه ملی سند علمی:
ICEE21_587
تاریخ نمایه سازی: 27 مرداد 1392
Abstract:
Level-crossing analog-to-digital converters (LC-ADCs) have shown to be power-efficient for a wide range of applications where sparse signals are processed. In this paper,after addressing different timing schemes in LC-ADCs, a comprehensive analysis on the effect of main error sources onthe LC-ADC performance is presented. Specifically, limitedresolution of the timer, limited accuracy of the quantization levels and the comparator delay are studied as main errorsources. Some design considerations and a more-accurate closed-form equation for the signal-to-noise ratio (SNR) are presented and confirmed using behavioral simulations.
Authors