Approximate Computing on FPGAs for Edge Computing Applications: A Case Study of Adaptive Filters

The exponential growth of data and the paradigm shift towards edge computing have necessitated innovative approaches to energy-efficient computation, especially for resource-constrained IoT devices. Approximate computing, a paradigm that exploits the inherent tolerance of many applications to imprecision, has been extensively explored in the context of ASICs to reduce power consumption and area overhead. However, its potential in FPGA-based devices, which offer flexibility and rapid prototyping capabilities, remains largely untapped. This paper investigates the feasibility and performance implications of approximate computing techniques for FPGAs, with a focus on the implementation of FIR and adaptive filters as illustrative case studies. Specifically, we propose novel approximate multipliers based on the Reverse Carry Propagation (RCP) adders, which are evaluated through their integration into adaptive and finite impulse response filters. Simulation results demonstrate significant improvements in operating frequency, as well as substantial reductions in hardware area for FIR filters. While the area reduction for adaptive filters is less pronounced, the proposed multipliers still exhibit acceptable performance. Our findings highlight the potential of approximate multipliers for low-power computing systems, particularly in edge computing applications.

Keywords:

Approximate computing , Edge computing , FPGA , Adaptive filter , Multiplier , adder , inexact arithmetic