A 9-bit 2-GSample/sN yquist Current-Steering CMOS DIA Converter

In this paper we present a high speed (2- Gsample/s) digital-to-analog converter suilable for using in an integratedc ircuit To get the best DNL, monotonicity and reduce glitch energ)/, 100% segmentatiohna s beenu sed.A novelm ethodu sedf or designedth ermometedre coderth at led to reduceda rea andp ower conwmptiono f digital circuit. V[/eh aveu sed a modified latch and cutent source to improve transient switching behaviour of cunent-steering CMOS digital-to-analog converters (DACs). Power consumptionis 214mWa t nyquistr ate. The chip has been processed in a standard 0.35p m CIIIOS technologAt.c tivea reao f chipi s 1850p m*1070m m

Keywords:

Current-steering , DAC , Digital , Analog , I ntegratedc ircuits