A Novel Frequency Compensation Technique in Three Stage Amplifiers with Active Feedback

This paper presents a dual-active capacitance in reversed nested Miller compensation (DACRNMC) technique for lowvoltage and large capacitive load amplifiers. The frequency bandwidth of the DACRNMC amplifier is improved due to the usage of active compensation capacitors. The amplifier's die area is reduced compared to the existing techniques in reversed nested Miller compensation (RNMC) scheme. The architecture also generates two left half plane zeros to increase the phase margin. The simulation results with a 0.18)m standard CMOS process achieve 17.4MHz unity gain bandwidth and 64 degree phase margin for proposed DACRNMC amplifier, while driving 500 pF load from a single 1.5 V power supply.

Keywords:

CMOS multistage amplifiers , nested Miller compensation , and active capacitive feedback