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Journal Paper
A New Low Power, Area Efficient ۴-bit Carry Look Ahead Adder in CNFET Technology
Authors:
Ali Ghorbani
،
Mehdi Dolatshahi
،
S. Mohammadali Zanjani
،
Behrang Barekatain
Year 1401
Publish place:
majlesi Journal of Electrical Engineering Issue 1، Vol 16
Pages:
9
| Language: English
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Journal Paper
Fast Mux-based Adder with Low Delay and Low PDP
Authors:
H. Tavakolaee
،
Gh. Ardeshir
،
Y. Baleghi
Year 1398
Publish place:
Journal of Artificial Intelligence & Data Mining Issue 3، Vol 7
Pages:
8
| Language: English
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Conference Paper
Design An High Speed 4 – Bit Carry Ripple Adder Using VHDL Code And Implementation on FPGA
Authors:
Parvin Mahmudi
،
Peiman keshavarzian
Year 1396
Publish place:
3rd.International Conference on Researches in Science & Engineering
Pages:
5
| Language: English
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Conference Paper
High Level Comparison of Full Adders in Verilog
Authors:
Negin Mahnai
Year 1394
Publish place:
Pages:
11
| Language: English
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