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Journal Paper
An Enhanced Self-checking Carry Select Adder Utilizing the Concept of Self-checking Full Adder
Authors:
M. Valinataj
Year 1400
Publish place:
International Journal of Engineering (IJE) Issue 2، Vol 34
Pages:
10
| Language: English
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Journal Paper
Reversible Logic Multipliers: Novel Low-cost Parity-Preserving Designs
Authors:
F. Eslami-Chalandar
،
M. Valinataj
،
H. Jazayeri
Year 1397
Publish place:
International Journal of Engineering (IJE) Issue 3، Vol 32
Pages:
12
| Language: English
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Journal Paper
Reliability and Performance Evaluation of Fault-aware Routing Methods for Network-on-Chip Architectures
Authors:
m Valinataj
Year 1393
Publish place:
International Journal of Engineering (IJE) Issue 4، Vol 27
Pages:
8
| Language: English
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