A Pipeline, Efficient and Programmable Architecture for the 1-D Discrete Wavelet Transform using Lifting Scheme

In this paper we propose a dedicated architecture to implement an efficient 1-D Discrete Wavelet Transform (DWT). Two different methods have been proposed for implementation of DWT namely traditional convolution based method and lifting scheme. To select the best method for hardware implementation, both methods have been implemented in software. Our simulation shows that lifting scheme is suitable for hardware implementation. In the next step the number of bits for the fraction part is determined by a C simulation. The proposed architecture is re-configurable for 5/3 and 9/7 filters and employs folded configuration to reduce the hardware cost and achieve higher hardware utilization. The architecture is useful for VLSI implementation and various image-video applications. The design has been modeled by VHDL language and simulated by Modelsim and is fully synthesizable.

Keywords:

Wavelet Transform , VLSI Architecture , Lifting Scheme , Pipeline , Image Compression