Design of magnetic dipole based ۳D integration nano-circuits for future electronics application

Nano Magnetic Logic (NML) has been attracting application in optical computing, nanodevice formation, and low power. In this paper nanoscale architecture such as the decoder, multiplexer, and comparator are implemented on perpendicular-nano magnetic logic (pNML) technology. All these architectures with the superiority of minimum complexity and minimum delay are pointed. The proposed architectures have been designed using pNML in MagCAD tool, simulated with modelsim platform and correctness shown by simulation waveform. The correctness of these designs can be verified easily when Verilog code is generated from MagCAD tool. The performance of the proposed comparator towards default parameters shows the area of ۲.۴۳۳۶ µm۲ and critical path of ۱.۵E-۷ sec. As a higher order, the realization of a ۴-to-۱ multiplexer in NML has also been included in this work.

Keywords:

Comparator , Decoder , Latency , Multiplexer , NML , pNML , QCA