fin field-effect transistor (finfet) technology: devices and architectures
Publish place: Twelfth National Conference on Applied Research in Electrical, Computer and Medical Engineering
Publish Year: 1401
Type: Conference paper
Language: English
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Document National Code:
ECMECONF12_001
Index date: 26 July 2022
fin field-effect transistor (finfet) technology: devices and architectures abstract
In this paper, we review research on FinFETs from the bottommost device level to the topmost ar- chitecturelevel. FinFETs are non-planar transistors built on SOI or Bulk substrate. FinFET describes any fin-based, multi-gatetransistor architecture, regardless of the number of gates. In FinFETs, the channel is formed by a thin fin wrapped by a gateover a lightly doped thin substrate. The gate interfaces with the channel from three sides providing better electrostaticcontrol of the with reduced leakage current and reduced short-channel effects. This paper mainly reviews the FinFETstechnology most involved in the modern electronics industry. Since Moore’s law driven scaling of planar MOSFETs facesformidable challenges in the nanometer regime, FinFETs have emerged as their successors. Owing to the presence ofmultiple (two/three) gates, FinFETs are able to tackle short-channel effects (SCEs) better than conventional planarMOSFETs at deeply scaled technology nodes and thus enable continued transistor scaling.
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fin field-effect transistor (finfet) technology: devices and architectures authors
محدثه حق بین
دانشجوی کارشناسی ارشد برق- الکترونیک، دانشگاه آزاد اسلامی واحد لنگرود