Low noise amplifier optimization using PSO Algorithm

The choice of the operating point and optimized dimensions of the transistor for achieving the optimized voltage gain and noise figure, considering the power consumption, is an important challenge in the design and optimization of low noise amplifiers. One of the most suitable methods for solving these challenges is meta-heuristic-algorithms. In this paper, the S parameters and the noise figure of a MOS transistor in ۱۸۰nm technology at a frequency of ۲.۴ GHZ in various operating points has been extracted from the ADS library using simulation. The PSO algorithm is used to find the optimized operating point and the dimensions of the transistor for the minimum noise figure and the maximum voltage gain, considering the power consumption. To evaluate the performance of the algorithm, the cascade CS structure with input matching network is designed and optimized to achieve the minimum noise figure and maximum voltage gain.

Keywords:

_low noise amplifier , particle swarm optimization , CMOS , noise figure_