A ۵Gbps, Inductor-less Transimpedance Amplifier for Optical Communications Using ۰.۱۸µm CMOS Technology

In this paper, a two-stage ۵Gbps transimpedance amplifier (TIA) for an optical communication receiver system is presented. The presented TIA uses a regulated cascode configuration (RGC) as the input stage, which benefits from low input resistance, and is followed by a gain stage with negative feed-back network and a buffer stage in order to provide extra gain to operate properly at ۵Gbps. DC operating point stabilizing is also considered in this paper. The proposed TIA is discussed mathematically and related simulations are performed in HSPICE using ۰.۱۸µm CMOS technology parameters. Results for the proposed TIA show the transimpedance gain of ۴۲.۱dBΩ, bandwidth of ۳.۶GHz, and power consumption of ۱۲mW at ۱.۵V supply voltage. Also, Monte-Carlo analysis, noise analysis and effect of temperature variation on frequency response of the TIA are analyzed, which indicate that the proposed TIA is suitable to work as a ۵Gbps TIA building block in an optical communication receiver system.

Keywords:

Transimpedance amplifier , Inductor-less , CMOS technology